mardi 26 janvier 2016

VHDL how to have multiple conditions in if statement

I'm trying to do an if statement that checks if bet_target is one of many numbers, the code looks something like this:

bet_target : in unsigned(5 downto 0);

if (bet_target = 1 or bet_target = 2 or bet_target = 3) then
            --do stuff  
end if;

The bet target is any number from 0 to 36 in binary from 6 switches. Is there a more compressed way for writing a statement as such?

Thanks

Aucun commentaire:

Enregistrer un commentaire