vendredi 29 juin 2018

Makefile execute echo only one time inside a rule

I have this Makefile

$(MAIN) : $(OBJECTS)

$(OBJECTS) : %.c
     compile file

And i want to use printf for print something like "compiling" whenever a file needs compile and "done" if a file has been compiled at the end of every compiled for example:

Compiling
file1.c
file2.c
file3.c
Done

I have tried to use sentences like if from shell or ifeq from makefile but i need a variable and makefile doesn't let me change the value of a variable inside of a if i don't know why. How can i archive this?

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