vendredi 30 avril 2021

syntax-error in vhdl code in the process line

i'm trying to do a 8 states of 3-bit running LED. The LED will move forward when the input x is 1 andmove backward when x is 0. with following conditions.

i've trying this for hours now and i don't know what's wrong with it. i'm learning vhdl right now so pleaseeee go easy on me. it says it's syntax error but i don't know where

library IEEE;
use IEEE.std_logic_1164.all;


entity Quiz10 is 

 port(
        x   : in    std_logic;
        output  : out   std_logic_vector(6 downto 0)
    );

end Quiz10;


architecture arch1 of Quiz10 is
    signal digit : integer range 0 to 9 := 0;

begin

process (x,digit)
begin
    if x = '1' then
        digit <=digit+1;
    elsif x = '0' then
        digit <=digit-1;
    elsif (digit>=9)
        digit<=0;
    end if;
end process;




output <="1111110" when digit = 0 else
               "0110000" when digit = 1 else
               "1101101" when digit = 2 else
               "1111001" when digit = 3 else
               "0110011" when digit = 4 else
               "1011011" when digit = 5 else
               "1011111" when digit = 6 else
               "1110000" when digit = 7 else
               "1111111" when digit = 8 else
               "1111011" when digit = 9 else
               "0000000";
    
  -- Your VHDL code defining the model goes here

end arch1;

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